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Detailed Explanation on the Design Scheme of Level 3 Hybrid Electric Vehicle Battery Charger

The level 3 electric / hybrid vehicle battery charger of Texas Instruments (TI) adopts digital power controller, communication device, high-performance driver and interface device. Level 3 charger includes AC / DC converter with PFC that generates DC voltage from AC and DC / DC converter. Its core device is real-time C2000 Series MCU.

Plug in hybrid electric vehicle (PHEV) and battery electric vehicle (Bev) are two emerging technologies. They use powerful motors and high-voltage battery packs as power and energy sources. Since the battery has a certain energy performance, PHEV and Bev must be supplemented periodically, generally by connecting to the power grid. In doing so, some forms of communication (PLC, wireless or RFID) may be used to manage charging activities and help authenticate the vehicle or owner for billing. Level 3 charging will play an important role in the public charging field to reduce the charging time and enable users to benefit more from the charging process.

The level 3 charging system for cars includes an AC / DC converter for generating a DC voltage from an AC line. The power to be charged will require power factor correction (PFC) to improve the power factor to meet regional rules and standards. At the center of the inverter is a real-time C2000 microcontroller. The controller is programmed to realize the required power management functions for the control loop, including AC / DC and DC / DC using PCF, so as to create the required elements for the battery. The C2000 controller includes advanced peripherals such as high-precision PWM output and ADC. It is designed to read the ADC and adjust the PWM in a separate clock cycle to achieve real-time control.

Figure 1 block diagram of dk-lm3s9b96 development board

Since the C2000 manages the power supply, the host controller is responsible for using the information and induced temperature provided by the communication module to drive the direct communication with the on-board battery pack. The information required for the charging state will be transmitted to the power controller, and important charging diagnosis and battery state will be sent to the display of level 3 charging system.

For safety reasons, isolation is required between the processor and the power supply and voltage, as well as between the communication bus and the external environment. Ti's digital isolator has logic input and output buffers separated by Ti silica (SiO2) isolation barriers, providing an isolation voltage of 4KV. When combined with isolated power supply, these devices block high voltage, isolate grounding voltage, and prevent noise current from entering the ground, affecting and damaging sensitive circuits. High performance analog components can be used to provide important system functions, such as MOSFET Drivers, sensor feedback, chip power supply and communication transceivers.

Communication on a simple system can be controlled by a separate processor. More systems with complex displays and linear accounting / reporting functions such as the level 3 charging system may require a second controller. A low frequency narrowband PLC (LF NB PLC) solution is adopted, which provides a better configuration in terms of bandwidth, power and cost requirements. The operation in narrow-band domain (frequency up to 500KHz) ensures the integrity of data and reduces the cost of the system. In this way, this standard will weigh the existing power line architecture, provide a cost-effective way to integrate intelligent monitoring, and control the new vehicle system. The data rate can vary from 1.2kbps to 100 Kbps according to the existing standards. Ti's PLC software is provided in plcsuite resource library, and users can support several modulation and standards in one design. Developers can implement sfsk, ice61334, prime and G3 standards and flexofdm standards in a separate design to realize the customization of OFDM and have applicability to the upcoming standards. In addition, it may be necessary to use wireless communication and / or RFID as a second communication protocol and a way of authentication and billing.

Stellaris lm3s2000 series is designed for controller area network (can) applications. It expands stellaris series by using Bosch can network technology (which is the gold standard of short-range industrial network). Its launch marks the first integration of can performance with the revolutionary arm Cortex-M3 core. In addition, several lm3s2000 Series MCU are also edited in the stellarisware software feature of memory ROM.

Ti infiltrates all the advantages of 32-bit performance and arm Cortex-M3 core microcontroller into all aspects of high field of microcontroller. For current 8-bit and 16 bit MCU users, stellaris series with Cortex-M3 kernel provides access to powerful development tools, systems, software and industry knowledge. Designers who will switch to stellaris will benefit from a large number of tools, small code space and excellent performance. And more importantly, designers can design arm subsystems on the basis of full confidence in the compatible development roadmap of $1 1GHz. For current users of 32-bit MCU, stellaris series provides implementation products using Cortex-M3 and thumb-2 instruction sets. With extremely fast response, thumb-2 technology integrates 16 bit and 32-bit instructions to provide a good balance between code density and performance. Thumb-2 reduces all memory by 26% compared with 32-bit code, but provides 25% higher performance. Texas Instruments stellaris series microcontrollers are arm Cortex-M3 core microcontrollers, which bring high-performance 32-bit computing into the application of cost sensitive embedded microcontrollers. These groundbreaking products allow customers to achieve 32-bit performance at the price equivalent to the previous 8-bit and 16 bit devices, all in a small pin package.

Lm3s2b93 microcontroller characteristics

Main characteristics of lm3s2b93 MCU:

arm Cortex-M3 processor core

80 MHz operating frequency: 100 DMIPS performance

arm cortex systick timer

nested interrupt controller (NVIC)

on chip memory

256 KB single cycle flash memory up to 50 MHz; Prefetch buffer improves performance above 50MHz

96kb single cycle SRAM

internal ROM containing stellarisware software

stellaris peripheral drive database

stellaris boot loader

Advanced Encryption Standard (AES) password usage table

cyclic redundancy check (CRC) error detection function

external peripheral interface (EPI)

8 / 16 / 32-bit dedicated flat bus for external peripherals

support SDRAM, SRAM / flash memory, FPGAs, CPLDs

advanced serial integration

two can 2.0 A / b controllers

three UARTS with IrDA and ISO 7816 support (one UART with demodulator control and status)

two I2C modules

two synchronous serial interface modules (SSI)

integrated chip audio (I2S) module

system integration

direct memory access controller (DMA)

system control and clock including on-chip high-precision 16mhz oscillator

four 32-bit timers (up to eight 16 bit)

8 capture compare PWM pins (CCP)

low power battery pack sleep module

real time clock in sleep module

two Watchdog Timers

a timer disconnected from the main oscillator

a timer separated from the high-precision internal oscillator

up to 67 GPIO, depending on the configuration

highly flexible pin combination allows the use of GPIO or one of a variety of peripheral functions

independent configurable 2mA, 4mA or 8Ma drive performance

up to 4 gpios can have 18 ma current drive performance

advanced motion control

eight advanced PWM outputs for sports and energy applications

four fault outputs to advance low delay shutdown

two integral encoder inputs (qei)


Figure 2 layout of top components of dk-lm3s9b96 development board PCB

two 10 bit analog-to-digital converters (ADCs) with 16 analog input channels and a sampling rate of millions of samples per second

three analog comparators

16 digital comparators

on chip voltage regulator

JTAG and arm serial line commissioning (SWD)

100 pin LQFP package

108 ball BGA package

Lm3s2b93 microcontroller is oriented to industrial applications, including remote monitoring, electronic point of sale equipment, test and measurement equipment, network equipment and switches, factory automation, HVAC and building control, game console, motion control, transmission, fire prevention and safety, etc.

For applications requiring large power conversion, the lm3s2b93 microcontroller has a sleep module for the battery, which can effectively reduce the power of the lm3s2b93 during inactivity to a low power state. Using power on / power off sequencer, duration counter (RTC), a pair of matching registers, an APB interface for system bus and special nonvolatile memory, the sleep module makes the lm3s2b93 microcontroller fully suitable for battery applications.

In addition, many arm advantages provided by lm3s2b93 microcontroller are widely applicable to development tools, system on chip (SOC) architecture, IP applications and large user communities.

In addition, the microcontroller adopts the thumb-2 instruction set compatible with arm to reduce the requirements of memory and reduce the cost. Lm3s2b93 microcontroller is compatible with all products in the extended stellaris series; Provides flexibility to meet customers' high-precision requirements.

The components are as follows:

R1 reset pull-up resistor

C1 reset input filter capacitor

C3 LDO regulator filter capacitor

C2, C4-C6, C11 VDD decoupling capacitor

C7, C18 VddC decoupling capacitor

c12-c17 crystal load capacitor

Y1 Ethernet crystal

Y2 main oscillator crystal

Y3 sleep module crystal

R3 Ethernet rbias resistor

R2 sleep oscillator resistor


R4 MDIO pull-up resistor

Stellaris lm3s9b96 development board

Stellaris lm3s9b96 development board provides a platform for developing the system and has the performance of lm3s9b96 arm Cortex-M3 core microcontroller.

Lm3s9b96 is a member of stellaris tempest class microcontroller family. The performance of stellaris tempest class device includes 80 MHz clock speed, an external peripheral interface (EPI) and audio I2S interface. In addition to the new hardware support for these features, the dk-lm3s9b96 board, including the stellaris board, has a rich set of peripherals.

The development board includes an on-board circuit debugging interface (icdi), which supports JTAG and SWD debugging. A standard arm 20 pin debugging head supports an array debugging solution.

Stellaris lm3s9b96 development kit accelerates the development of tempest class microcontroller. The suite also includes more sample applications and complete resource code.

Main features of stellaris lm3s9b96 development board:

easy setup - USB cable provides debugging, communication and power

flexible development platform with multiple peripherals

color LCD picture display

TFT LCD module with 320 240 resolution

resistive touch interface

80 MHz lm3s9b96 microcontroller with 256K flash, 96k SRAM, and integrated MAC PHY, USB OTG and can communication

8 MB SDRAM (plug-in EPI palette)

EPI break out board (optional plug-in board)

1 MB serial flash memory

high precision 3.00 V reference voltage

safertos operating system in microcontroller ROM

I2S stereo audio codec

linear I / O

headphone output

controller area network (can) interface

10 / 100 Ethernet

USB on the go (OTG) connector

device, host and OTG modes

user led and buttons

thumbwheel voltage divider (can be used for menu navigation)

microSD card slot

supports a wide range of debugging options


Detailed Explanation on the Design Scheme of Level 3 Hybrid Electric Vehicle Battery Charger 1

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